Freelance STS : Les nouveaux freelances inscrits

Exemple d'expériences de Youssef,
freelance STS résidant dans Paris (75)

• C++ development engineer

  Ineo Systrans - ********
  2019 - aujourd'hui

  • Project: development of embedded software for the Operational Assistance and Passenger
  Information System (SAEIV).

  • Environment: C++ 11, Multithreading, Linux, Windows, Android, Docker, Git, GitLab, SQL, Visual Studio.

• Final Year Internship – Master degree LNE - ********
  Jan 2016 - Jan 2016

  FPGA design and implementation of three digital-analog converters « AD5791 » controller for the
  metrological Atomic Force Microscope (mAFM):
  Environment: VHDL, SPI, QuestaSim, Vivado, LabVIEW, LabVIEW FPGA/Real-Time, NI PXI-7852R,
  Virtex-5 Xilinx, Agilent 3458A multimeter, oscilloscope
  
  Co-Design Project
  Design of a digital IP core to optimize the execution time of a program written in C which executes
  neural network for character recognition:

  Environment: C, VHDL, TCL, AXI4, Eclipse, QuestaSim, Vivado, ARM Cortex-A9, Zynq-7000 Xilinx.

• Pierre and Marie Curie University, Paris-VI - ********
  Jan 2015 - Jan 2016

  Final Year Internship – Engineering degree
  HCELL ENGINEERING - ********
  Development of a physical test environment for five FPGA loaded on three cards of an avionics
  computer using LABVIEW (under DO-254) :

  Environment: VHDL, TCL, ModelSim, LabWindows, LabVIEW FPGA, NI PCIe-7841R, multimeter, oscilloscope.

• Development engineer (Software/Hardware)

  Novasys Ingénierie - ********
  aujourd'hui

  » Job: Project Manager – Ansaldo STS (2 months)
  • Project: development of a test tool for an electronic board – team of 2 peoples.
  • Environment: Python, QT, Git.
  » Job: Project Manager – Ansaldo STS (4 months) – team of 6 peoples.
  • Project : unit tests of software modules of the “ERTMS” project (4 months).
  • Environment: VectorCAST, Microsoft Office (Word, Excel), Git.
  » Job : C development engineer – Ansaldo STS (6 months)
  • Project: auto-tests of ARM cortex-A53 CPU for a TGV calculator.
  • Environment: C, ASM, Vivado, PetaLinux SDK, Zynq MPSoC Ultrascale+ ZCU106 Xilinx, Linux
  Ubunto.
  » Job : C/C++ development engineer– Ansaldo STS (6 months)
  • Project: development of a gateway (RIF) between the WestCAD and the SEI of Ansaldo STS.
  • Environment: C/C++, Socket, Visual Studio, Linux Debian 7.
  » Job : C development engineer – ALSTOM (3 months)
  • Project: porting a tool which identifies the most expensive runtime processing from running on a
  PowerPC processor to a Coldfire processor.
  • Environment: C, Socket, serial link, interrupt, exception, ColdFire MCF5485 / MCF5235, Linux.
  » Job : software development engineer – ALSTOM (3 months)
  • Project: modernization of KCVP system.
  • Environment: C, Python, Socket, TCP/IP, UDP, SNMP, Linux, Windows.
  » Job : FPGA design engineer – Ansaldo STS (6 months):
  • Project: design of a receiver module for radios messages and another modules for dating
  localization signals on redundant FPGAs.
  • Environment: VHDL, TCL, Balogh, QuestaSim, Xilinx ISE, Quartus II, Cyclone II Altera, Spartan-3
  Xilinx.
  » Job : software development engineer – Ansaldo STS (3 months):
  • Project: updating of the "Automatic Train Operation (ATO)" simulation environment.

  • Environment: Python, C++, Shell, Linux, Windows

• FPGA engineer / DO-254 (DAL A)

  aujourd'hui

  Design and verification of FPGAs/IP cores according to the standard:
  » Job : FPGA design engineer - Zodiac Aerospace (8 months):
  • Projects : development of 2 digital IP cores : Flash-NOR memory controller and MRAM memory
  controller.
  • Environment: C, VHDL, TCL, NIOS II, Avalon MM, SPI/QSPI, QuestaSIM, Quartus II, Qsys, System
  Console, ARRIA-10, CVS.
  » Job : FPGA verification enginner - DO-254 (DAL A) – Sagem Defence Security (7 months)
  • Project: verification of a control system for landing gears, steering, wheels and brakes.

  • Environment: VHDL, TCL, ModelSim SE, CVS. HCELL ENGINEERING - ********