Karim - Développeur CAO

Ref : 121217E001
Photo de Karim, Développeur CAO
Compétences
C
JAVA
UNIX
DESIGN CAD
DESIGN VIEW
MATLAB
J2EE
CAO
VC++
WINDOWS 7
Expériences professionnelles

  • From june 2009 :
    Company: CDD (Centre de Design et Développement).
    Role: Engineer
    Activity: Full-Custom Layout of Integrated Circuit (Modules and chops)

    From June 2008 to June 2009:
    Company: Amsys Frances
    Role: Engineer
    Activity: Full-Custom Layout of Integrated Circuit (Modules and chops)

    From October 2006 to June 2008:
    Company : CDD (Centre de Design et Développement).
    Role : Engineer
    Activity : Full-Custom Layout of Integrated Circuit (Modules and chops)
    Technical Environnement: Layout of Analogue Modules and Chips for different Texas- Instrument, Atmel, Connexant, Freescale Semiconductor and OnSemi technologies.
    • Layout of Analogue Modules in different processes : TI/lbc7 [0.35um], TI/a035 [0.13um], TI/c021 [65nm], CSM [0.18um], TSMC [0.25um], TSMC [90nm], UMC [0.13um], ATML/at56khv [0.35um], ATML/at58khv [0.13um],
    LDO Regulator [Low Drop Out], Charge pump, White-Led Driver, DCDC Converters.
    • Layout of a full chip: White-Led Driver for Atmel
    • Routing optimization and post-layout simulations of power parts [Parasitic Resistances, IR drop and Electro-migration, using Assura et Calibre RCX] of models for different Texas-Instrument, Atmel, Connexant, Freescale Semiconductor and OnSemi technologies: LDO Regulator, Charge pump, white-Led Driver, DCDC Convertes.

Études et formations

  • Educations:
    October 2005 to February 2006 : Professional Training Course in Microelectronics: Layout of Integrated Circuits,, Electrical Simulations, Top Level Validation, at Centre de Design et Développement (Fès, Morocco).

    October 2003 to June 2005 : Master Degree Micro-electronics at Faculty of Sciences, Fès Morocco

    October 2000 to June 2003 : Bachelors Degree in Electronics, Electrotechnics, Automatics Option at Faculty of Sciences, Fès Morocco

    June 2000 : High-School diploma in Mathematic Sciences

    Skills :
    • Physical Design : Cadene-IC, Virtuoso, Virtuoso-XL
    • Physical Verification: Assura, Calibre, Diva, Chameleon
    • Physical Verification Checks: DRC, LVS, Antenna, Latchup, ESD, IR-Drop.
    • Physical Extraction: Assura RCX, Calibre Extraction, Diva Extraction
    • Process :0.35um, 0.25um , 0.18um, 0.13um, 90nm, 45nm
    • Simulation(Post-Layout): Cadence Analog-Artist, Eldo, Spictre, TIspice
    • Operating Systems: Unix, Linux, Windows.

    Languages:
    French: Fluent
    English: Technical

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