Max - Développeur FPGA
Ref : 200127N002-
38000 GRENOBLE
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Développeur, Ingénieur Télécom, Ingénieur système (31 ans)
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Totalement mobile
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En profession libérale
WORK EXPERIENCE
Jan 2019 - Jul 2019
High Speed interconnect IP developer
PLDA, Aix en Provence (France – Bouches du Rhone)
Designing a FPGA‑Based Logic application
to demonstrate the functionalities and performances of new Gen‑Z IP.
2018 - 2019
Charity Action & Athletism Training Internship
Iten (Kenya – Africa)
Build a primary school and train for French selection team of an
international 10km race
May 2017 - Jul 2017
Electronic Analog RF Design lab.
UPC – Electronic Designing Dept, Barcelona (Spain - Calanunya)
Study, design and optimze the performance of Low Noise Amplifiers in Ultra
Low Power field with FDSOI 28nm technology
Jun 2016 - Sep 2016
Electronic Chips Producer
ST MICROELECTRONICS, Crolles (France - Isere)
In charge of the production of one sector. Fill & program several machines
with waffers. run & measure tests to certify the nocontamination of machines
EDUCATION AND QUALIFICATIONS
2019
Embedded System On Chip
Inp Phelma, Grenoble (38)
Digital hardware design specialisation
2018
Engineering Degree
NP Phelma, Grenoble (38)
Electronic Integrated Systems
2012
Baccalaureate
Rosa Park high school, Neuville s/ Saone (69)
Option Ingeneering Science